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AS4C32M16D1-5BAN

Name: Alliance Memory AS4C32M16D1-5BAN
Brand: Alliance Memory
SKU: 913-AS4C32M16D1-5BAN
Price: 9.23 USD
Availability: InStock

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Mouser No:

913-AS4C32M16D1-5BAN

Mfr. No:

AS4C32M16D1-5BAN

Mfr.:

Alliance Memory

Description:

DRAM DDR1, 512Mb, 32M X 16, 2.5V, 60-ball BGA, 200 MHz, Automotive Temp - Tray

Datasheet:

AS4C32M16D1-5BAN Datasheet (PDF)

ECAD Model:

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More Information

Learn more about Alliance Memory AS4C32M16D1-5BAN

In Stock: 101

Stock:: 101 Can Dispatch Immediately

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Factory Lead Time:: 16 Weeks Estimated factory production time for quantities greater than shown.

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Ext. Price:

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Pricing (USD)

Qty.	Unit Price	Ext. Price
	$9.23	$9.23
	$8.58	$85.80
	$8.32	$208.00
	$8.12	$406.00
	$7.93	$793.00
	$7.50	$1,800.00
	$7.41	$3,556.80
	$7.32	$8,784.00
2,640	Quote

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Alliance Memory
Product Category:	DRAM
RoHS:
Type:	SDRAM - DDR
Memory Size:	512 Mbit
Data Bus Width:	16 bit
Maximum Clock Frequency:	200 MHz
Package/Case:	FBGA-60
Organisation:	32 M x 16
Access Time:	700 ps
Supply Voltage - Min:	2.3 V
Supply Voltage - Max:	2.7 V
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 105 C
Series:	AS4C32M16D1
Packaging:	Tray
Brand:	Alliance Memory
Country of Assembly:	Not Available
Country of Diffusion:	Not Available
Country of Origin:	TW
Moisture Sensitive:	Yes
Mounting Style:	SMD/SMT
Product Type:	DRAM
Factory Pack Quantity:	240
Subcategory:	Memory & Data Storage
Supply Current - Max:	108 mA

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Datasheet

AS4C32M16D1-5BAN Datasheet (PDF)

USHTS:: 8542320028
ECCN:: EAR99

DDR1 Synchronous DRAM

Alliance Memory DDR1 Synchronous DRAM is a high-speed CMOS double data rate synchronous DRAM. It is internally configured with a synchronous interface (all signals are registered on the positive edge of the clock signal, CK). Data outputs occur at both rising edges of CK and CK. Read and write accesses to the SDRAM are burst oriented. The Accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command.