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AS4C64M16D3LB-12BIN

Name: Alliance Memory AS4C64M16D3LB-12BIN
Brand: Alliance Memory
SKU: 913-A4C6416D3LB12BIN
Price: 8.42 USD
Availability: OutOfStock

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Mouser No:

913-A4C6416D3LB12BIN

Mfr. No:

AS4C64M16D3LB-12BIN

Mfr.:

Alliance Memory

Description:

DRAM DDR3, 1G, 64M X 16, 1.35V, 96-BALL FBGA, 800MHZ, (B-die), INDUSTRIAL TEMP - Tray

Datasheet:

AS4C64M16D3LB-12BIN Datasheet (PDF)

ECAD Model:

Download the free Library Loader to convert this file for your ECAD Tool. Learn more about the ECAD Model.

More Information

Learn more about Alliance Memory AS4C64M16D3LB-12BIN

Availability

Stock:: Non-Stocked

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Factory Lead Time:: 8 Weeks Estimated factory production time.

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Ext. Price:

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Pricing (USD)

Qty.	Unit Price	Ext. Price
	$8.42	$8.42
	$7.83	$78.30
	$7.59	$189.75
	$7.41	$370.50
	$7.06	$706.00
	$6.88	$1,307.20
	$6.78	$3,864.60
	$6.60	$7,524.00

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Alliance Memory
Product Category:	DRAM
RoHS:
Type:	SDRAM - DDR3L
Memory Size:	1 Gbit
Data Bus Width:	16 bit
Maximum Clock Frequency:	800 MHz
Package/Case:	FBGA-96
Organisation:	64 M x 16
Access Time:	20 ns
Supply Voltage - Min:	1.283 V
Supply Voltage - Max:	1.45 V
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 95 C
Series:	AS4C64M16D3LB
Packaging:	Tray
Brand:	Alliance Memory
Country of Assembly:	Not Available
Country of Diffusion:	Not Available
Country of Origin:	TW
Moisture Sensitive:	Yes
Mounting Style:	SMD/SMT
Product Type:	DRAM
Factory Pack Quantity:	190
Subcategory:	Memory & Data Storage
Supply Current - Max:	72 mA
Unit Weight:	1.354 g

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Datasheet

AS4C64M16D3LB-12BIN Datasheet (PDF)

REACH Declaration (PDF)

CNHTS:: 8542329000
CAHTS:: 8542320020
USHTS:: 8542320032
TARIC:: 8542323900
MXHTS:: 8542320201
ECCN:: EAR99

DDR3L SDRAM

Alliance Memory DDR3L SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is an 8n-prefetch architecture with an interface that transfers two data words per clock cycle at the I/O pins. A single read or write operation for the DDR3 SDRAM effectively consists of a single 8n-bit-wide, four-clock-cycle data transfer at the internal DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins. Alliance Memory DDR3L SDRAM is available in various package sizes.