IS64C6416AL-15TLA3

ISSI
870-64C6416AL-15TLA3
IS64C6416AL-15TLA3

Mfr.:

Description:
SRAM 1Mb 5V 15ns 64K x 16 Async SRAM

ECAD Model:
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In Stock: 104

Stock:
104 Can Dispatch Immediately
Factory Lead Time:
14 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1   Maximum: 6
Unit Price:
$-.--
Ext. Price:
$-.--
Est. Tariff:

Pricing (USD)

Qty. Unit Price
Ext. Price
$5.63 $5.63

Product Attribute Attribute Value Select Attribute
ISSI
Product Category: SRAM
Delivery Alerts:
 This product may require additional documentation to export from the United States.
RoHS:  
1 Mbit
64 k x 16
15 ns
Parallel
5.5 V
4.5 V
50 mA
- 40 C
+ 125 C
SMD/SMT
TSOP-44
Tray
Brand: ISSI
Country of Assembly: Not Available
Country of Diffusion: Not Available
Country of Origin: TW
Data Rate: SDR
Moisture Sensitive: Yes
Product Type: SRAM
Series: IS64C6416AL
Factory Pack Quantity: 135
Subcategory: Memory & Data Storage
Type: Asynchronous
Unit Weight: 6.563 g
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CNHTS:
8542319090
CAHTS:
8542320030
USHTS:
8542320041
JPHTS:
8542320194
KRHTS:
8542321020
TARIC:
8542324500
MXHTS:
8542320299
ECCN:
3A001.B.2.B

Asynchronous SRAMs

ISSI Asynchronous SRAMs are offered in x8, x16, and x32 configurations. These devices are available in high-speed, low-power, high-speed/low-power, PowerSaver lower power, and automotive versions with long-term support offered by ISSI's commitment to the continued development of these products. ISSI Asynchronous SRAMs feature a wide offering of densities (64K to 16M), speeds (8ns to 55ns), supply voltages (1.65V to 5V), and temperature ranges (commercial, industrial, and automotive). These devices are available in a variety of packages (BGA, SOJ, SOP, sTSOP, and TSOP) to fit a variety of design needs.

IS64C6416AL High-Speed CMOS Static RAM

ISSI IS64C6416AL High-Speed CMOS Static RAM is high-speed, 1,048,576-bit static RAM organized as 65,536 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process, coupled with innovative circuit design techniques, yields access times as fast as 12ns with low power consumption. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE, and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access.